Design Your Bandpass Filter

  1. Describe Your Filter.

  2. Choose Your Architecture.

  3. Build Your Filter.

  4. Download Your Filter!

Bandpass Filter Designer

Design Your Filter

Explore the inputs to design your filter shape. We limit the filter complexity to values we think most users will find reasonable, but if you need a filter that cannot be designed with this form, please contact us and we will work together towards an FPGA solution that is right for you.

See Some Examples

Try Some Examples

We offer a number of architectures to run your filter on, but some of the options can be a little overwhelming at first. Pick an example and we will fill in all of the required fields for you.

Slow Filter : MACC

If you have a relatively slow sample rate you could use a MACC structure to save a bunch of hardware. This example will run at a sample rate of 5MHz and a clock rate of 300MHz.

Medium Speed : Semi-Parallel

If you have a moderate sample rate you can still save some hardware. This example will filter data at a sample rate of 40MHz and run at a clock rate of 280MHz.

Fast Filter : Systolic

If you have a high speed ADC you might need a fast filter. This example will process data at a sample rate of 450MHz.

We encourage you to play around with this tool.

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